Xilinx

SOC and MPSOC

Zynq UltraScale+ MPSoC for the Software Developer

Course Description

This course provides software developers with an overview of the capabilities and support for the Zynq® UltraScale+™ MPSoC family from a software development perspective. The emphasis is on:

  • Reviewing the catalog of OS implementation options, including hypervisors and various Linux implementations

  • Booting and configuring a system

  • Applying various power management techniques for the Zynq UltraScale+ MPSoC family

Duration

2 days

Level

Embedded Software 3

Who Should Attend

Software developers interested in understanding the OS and other capabilities of the Zynq UltraScale+MPSoC device.

Course Prerequisites

  • General understanding of embedded and real-time operating systems

  • Familiarity with issues related to implementing a complex embedded system

Software Tools

  1. Vivado® Design Suite 2020.1

  2. Vitis™ unified software platform 2020.1

  3. Hardware emulation environment:

  • VirtualBox

  • QEMU

  • Ubuntu desktop

  • PetaLinux

Hardware

​Zynq UltraScale+ MPSoCZCU104 board*

Skills Gained

After completing this training, you will know how to:

  • Distinguish between asymmetric multi-processing (AMP) and symmetric multi-processing (SMP) environments

  • Identify situations when the ARM® TrustZone technology and/or a hypervisor should be used

  • Effectively use power management strategies and leverage the capabilities of the platform management unit (PMU)

  • Define the boot sequences appropriate to the needs of the system

  • Define the underlying implementation of the application processing unit (APU) and real-time processing unit (RPU) to make best use of their capabilities

Course Outline

Day 1​

 

  • Application Processing Unit Introduction to the members of the APU, specifically the Cortex™-A53 processor and how the cluster is configured and managed.

  • Real-Time Processing Unit Focuses on the real-time processing module (RPU) in the PS, which is comprised of a pair of Cortex processors and supporting elements.

  • Arm TrustZone Technology Illustrates the use of the Arm® TrustZone technology.

  • QEMU Introduction to the Quick Emulator, which is the tool used to run software for the Zynq UltraScale+ MPSoC device when hardware is not available.

  • HW-SW Virtualization Covers the hardware and software elements of virtualization. The lab demonstrates how hypervisors can be used.

  • Multiprocessor Software Architecture Focuses on how multiple processors can communicate with each other using both software and hardware techniques.

  • Xen Hypervisor Description of generic hypervisors and discussion of some of the details of implementing a hypervisor usingXen.(Pairs with OpenAMP, but not SMP)

  • OpenAMP Discusses how the OpenAMP framework can be used to construct systems containing both Linux and Standalone applications within the APU.(Pairs with the Xen Hypervisor, but not SMP)

  • Linux Describes how to configure Linux to manage multiple processors.

  

Day 2

  • Yocto Compares and contrasts the kernel building methods between a "pure" Yocto build and the PetaLinux build (which uses Yocto "under-the-hood").

  • Open Source Library (Linux) Introduction to open-source Linux and the effort and risk-reducing PetaLinux tools.

  • FreeRTOS Overview of FreeRTOS with examples of how it can be used.

  • Software Stack Introduction to what a software stack is and a number of stacks used with the Zynq UltraScale+ MPSoC.

  • PMU Introduction to the concepts of power requirements in embedded systems and the Zynq UltraScale+ MPSoC.

  • Power Management Overview of the PMU and the power-saving features of the device.

  • Booting How to implement the embedded system, including the boot process and boot image creation. Also how to detect a failed boot.

  • First Stage Boot Loader Demonstrates the process of developing, customizing, and debugging this mandatory piece of code.

Partners 

09_MW_logo_RGB.jpg

Upcoming Program

xilinx ATP 黑.png

TechSource Systems is the Sole Distributor and Authorised Training Partner of Mathworks Products