Top-Down FPGA and ASIC Design and Verification with MATLAB
Why Adopting a MATLAB and Simulink Workflow Matters
Thank you for your interest in FPGA implementation with MATLAB and Simulink.
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How Modeling and Simulation Bring Algorithm Development and SoC Design Together - Article
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Driving the Adoption of Model-Based Design for Communications System Development at Hitachi - Article
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Ultra-Low Power Model-Based ASIC Design for Implantable Medical Products Using HDL Coder (27:16) - Video
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5G R&D at Huawei: An Insider Look - Customer Q&A
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ASIC and FPGA Workflow for ISO 26262 and IEC 61508 (3:06) - Video
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How to Use Model-Based Design to Demonstrate DO-254 Compliance (8:25) - Video
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Designing a Datapath from an FPGA to a Processor with SoC Blockset (2 Videos) - Video Series
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Compare FIR Filter Implementations Using socModelAnalyzer - Example
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Methodology Guide for Learning and Evaluating HDL Coder - File Exchange