Programming and Language
Aunt Bette's Homemade Pecan Pie |
Rockin’ Rocky Road Ice Cream |
Tom’s Heavenly Apple Strudel |
Joe’s Divine Butter Tarts |
Aunt Bette's Homemade Pecan Pie |
Rockin’ Rocky Road Ice Cream |
Tom’s Heavenly Apple Strudel |
Joe’s Divine Butter Tarts |
Aunt Bette's Homemade Pecan Pie |
Rockin’ Rocky Road Ice Cream |
Tom’s Heavenly Apple Strudel |
Joe’s Divine Butter Tarts |
Aunt Bette's Homemade Pecan Pie |
Rockin’ Rocky Road Ice Cream |
Tom’s Heavenly Apple Strudel |
Joe’s Divine Butter Tarts |
FPGA Webinar Series
Systematic Timing Closure techniques for Xilinx FPGA Designs
Online via Webex | 29 Nov 2019
Singapore, Malaysia, Philippines - 10:00am to 11:00am | Thailand, Vietnam - 9:00am to 10:00am
Speaker Profile
Wikneswaran (Wicky) Pillai
Principal Consultant and Trainer
Wicky is an experienced FPGA designer with over 22 years of experience in applications of FPGAs and related methodologies to the emerging programmable logic industry. He has delivered numerous FPGA design consultancy services and conducting several trainings in FPGAs and HDL based methodologies for international companies like Cisco Systems, Tata Communications, Olympus, DSO National Laboratories, ST Electronics, etc.
Prior to that, he has headed a team primarily focusing on FPGA centric designs and has done architecting of key FPGA based systems and defining optimal engineering processes.