MATLAB & Simulink
SIGNAL PROCESSING AND COMMUNICATIONS
Software-Defined Radio with Zynq using Simulink
This hands-on, one-day course focuses on modeling designs based on software-defined radio in MATLAB® and Simulink® and configuring and deploying on the ADI RF SOM. Topics include:
-Modeling communications systems using Simulink
-Implementing Radio I/O with ADI RF SOM and Simulink
-Prototype deployment with real-time data via HW/SW co-design
After the training, the participants will be able to design and simulate communication system with MATLAB and SIMULINK, implement radio I/O with ADI RF SOM with SIMULINK, and do prototype deployment with real-time data using HW/SW co-design.
Techsource Systems is
Mathworks Sole and Authorised Distributor and Training Partner
Programming Xilinx Zynq SoCs with MATLAB and Simulink. Knowledge of concepts of communications and hardware design.
Who Should Attend
This course is intended for engineer, researchers, scientists, and managers, who are involved in the design of software-defined-radio system and working on the deployment to ADI RF SOM.
Day 1 of 1
Model Communications System using Simulink
Objective: Model and simulate RF signal chain and communications algorithms.
- Overview of software-defined radio concepts and workflows
- Model and understand AD9361 RF Agile Transceiver using Simulink
- Simulate a communications system that includes a transmitter, AD9361 Transceiver, channel and Receiver (RF test environment)
Implement Radio I/O with ADI RF SOM and Simulink
Objective: Verify the operation of baseband transceiver algorithm using real data streamed from the AD9361 into MATLAB and Simulink.
- Overview of System object and hardware platform
- Set up ADI RF SOM as RF front-end for over-the-air signal capture or transmission
- Perform baseband processing in MATLAB and Simulink on captured receive signal
- Configure AD9361 registers and filters via System object
- Verify algorithm performance for real data versus simulated data
Prototype Deployment with Real-Time Data via HW/SW Co-Design
Objective: Generate HDL and C code targeting the programmable logic (PL) and processing system (PS) on the Zynq SoC to implement TX/RX.
- Overview of Zynq HW/SW co-design workflow
- Implement Transmitter and Receiver on PL/PS using HW/SW co-design workflow
- Configure software interface model
- Download generated code to the ARM processor and tune system parameters in real-time operation via Simulink
- Deploy a stand-alone system