Generating HDL Code from Simulink

Generating HDL Code from Simulink

SGD 2,160.00
QUANTITY:

Pricing
*For Singapore, prices are subject to prevailing 7% Goods and Services Tax
*Reinstatement fee is subject to changes. Please contact us for latest pricing information

Course Highlights

This two-day course shows how to generate and verify HDL code from a Simulink® model using HDL Coder™ and HDL Verifier™.

Topics include:

  • Preparing Simulink models for HDL code generation
  • Generating HDL code and testbench for a compatible Simulink model
  • Performing speed and area optimizations
  • Integrating handwritten code and existing IP
  • Verifying generated HDL code using testbench and cosimulation

Who Should Attend

Engineers who wish to design and simulate their system with Simulink and accelerate the implemention to FPGA by using HDL Coder.

Course Prerequisites

Signal Processing with Simulink or equivalent experience using Simulink.

Course Benefits

Upon the completion of the course, the participants will be able to:

  • prepare Simulink models for HDL code generation
  • generate HDL code and a test bench for a compatible model
  • perform speed and area tradeoffs – interface handwritten code and existing IP
  • verify HDL code using a test bench and cosimulation

    For more detail on this course, kindly click here.

    Advance payment is required.

    Customer shall pay the full amount due fourteen (14) calendar days prior to course commencement or immediately upon placing the Order if placed less than fourteen (14) days and accepted by TechSource, prior to the commencement of the Course(s).

    Subscribe to our Newsletter