FPGA and SoC Design for Intel Devices with MATLAB and Simulink
Learn how to accelerate your design cycle for Intel FPGAs and SoCs using HDL code generation tools from MATLAB® and Simulink®. In these webinars, we demonstrate how code generation with MATLAB and Simulink supports these FPGA and SoC design tasks:
Build complete system models in Simulink.
Refine models for FPGA and SoC implementation and verify with system models.
Apply optimizations for improved performance and reduced FPGA resource usage.
Verify FPGA design implementations through cosimulation with VHDL and Verilog models and hardware cosimulation using Intel development boards.