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In this workshop, you will learn about the Versal™ adaptive SoC and the architecture of the AI Engine, the various interfaces available in the AI Engine tile, Versal AI Engine Tool Flow and Vitis Model Composer for AI Engine Design.

In this workshop, you will learn how to use MATLAB and Simulink to model and simulate hardware architectures and algorithms. System deployment to Versal Adaptive SoC boards using automatic HDL and C code generation will be covered as well.

In this workshop, you will learn about the Model-Based Design workflow using Model Composer, how to setup the Simulink model using blocks from HDL library and do automatic code generation, how to import a Model Composer HDL design into a bigger system.

Learn about Vitis Model Composer and its HLS block set in the Xilinx toolbox. Develop production-quality IP implementations using high-level synthesis technology. Join our workshop now!

The webinars will show the workflow steps starting from modeling the machine and control logic, to desktop simulation and testing, PLC code generation, real-time Hardware-in-the-Loop simulation, and Virtual Commissioning with 3D visualization.

In this session you will learn the basics of Simulink for modIn this session you will learn the basics of Simulink for modeling, simulating, and analyzing multidomain dynamical systems. You will see how to build simulation models using Simulink’s block diagramming interface, customizable set of libraries, and connectivity to MATLAB.eling, simulating, and analyzing multidomain dynamical systems. You will see how to build simulation models using Simulink’s block diagramming interface, customizable set of libraries, and connectivity to MATLAB.