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TechSource Systems Pte Ltd

[1 Day Free Workshop] Hardware Design Using HDL Library on AMD Vitis Model Composer and Simulink

February 6, 2024

Learn about Vitis Model Composer and its HLS block set in the Xilinx toolbox. Develop production-quality IP implementations using high-level synthesis technology. Join our workshop now!

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TechSource Systems Pte Ltd

Design of 5G mmWave Beamforming Systems

December 18, 2023

5G and 6G communication systems will employ mm-Wave frequencies. This has made the development of highly integrated antenna arrays and RF front ends a standard practice. Engineers need to integrate RF,...

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TechSource Systems Pte Ltd

Design, Analyze and Deploy Wireless Systems on Zynq UltraScale+RFSoC

September 15, 2023

This webinar demonstrates the deployment of a Wireless System on an RFSoC device using Model-Based Design with MATLAB and Simulink. The talk emphasizes the benefits of this approach including system-level modeling, automated code generation, earlier verification, and faster adaptation to specification changes.

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TechSource Systems Pte Ltd

Beamforming for MU-MIMO in 5G New Radio

January 3, 2023

In this webinar, you will learn about single- and multi-user MIMO in 5G NR, as well as common beamforming techniques and scenarios. We will cover different techniques to estimate the channel or channel...

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TechSource Systems Pte Ltd

Optimize FPGA and ASIC Speed and Area Using HDL Coder

June 16, 2022

Learn how to use HDL Coder optimization and design techniques to meet your target-specific speed and area goals. HDL Coder offers techniques that span from automatic to fully-controlled, and all of them allow for rapid exploration of implementation options. This webinar will explain these options and their associated benefits and tradeoffs, including verification considerations, and will discuss techniques specific to FPGA and ASIC targeting.

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TechSource Systems Pte Ltd

Prototyping and Verifying Wireless Systems on FPGAs and ASICs

June 16, 2022

In this talk, you will learn about how MATLAB and Simulink can be used for early ASIC design through pre-verified, hardware-ready reference applications for different wireless communication applications, reuse of algorithm models in production verification environments and FPGA based debugging workflows.

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TechSource Systems Pte Ltd

Optimize FPGA and ASIC Speed and Area Using HDL Coder

March 14, 2022

Learn how to use HDL Coder optimization and design techniques to meet your target-specific speed and area goals.

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