Xilinx

High Level Synthesis SDSoC-SDAccel  

Developing AWS Applications Using the SDAccel Environment

Course Description

This one-day course is structured to help designers new to the Amazon Web Services (AWS) F1 instance quickly understand the complete flow of design generation for AWS F1. The focus is on utilizing the tools to accelerate a design at the system architecture level and the optimization of the accelerators.

Duration

1 day

Who Should Attend

Anyone interested in quickly adding hardware acceleration to a software system.

Course Prerequisites

  • Basic knowledge of Xilinx FPGA architecture
    Comfort with the C programming language
    Familiarity with OpenCL™ API programming
    Accelerating OpenCL Applications with the SDAccel Environment course or equivalent

Software Tools

  • SDx™ development environment 2017.1

Hardware

  • Architecture: AWS-VU9P-F1 (Virtex® UltraScale+™ VU9 FPGA)

Skills Gained

After completing this training, you will know how to:

  • Describe the Amazon Web Services (AWS) F1 instance development flow with the SDAccel™ development environment
    Explain how the SDx™ development environment helps the software developer to focus on applications
    Create kernels from C, C++, OpenCL, or RTL IP
    Describe the RTL kernel interface requirements
    Create a kernel with the RTL Kernel Wizard

Course Outline

Day 1​

 

1.1 Introduction to the AWS F1 Instance and the SDAccel Environment 
Describes the AWS F1 instance, the benefits of using the F1 instance, and the AWS F1 development flow. 

1.2 Understanding the AWS F1 Hardware and Software Stacks 
Explains the hardware and software stacks of the AWS F1 platform and explains how they work together to provide an acceleration solution. 

1.3 Introduction to the SDAccel Environment and OpenCL Framework
Explains how software engineers and application developers can benefit from the SDAccel™ development environment and Open Computing Language (OpenCL™) framework. 

1.4 SDx Tools Overview 
Describes the elements of the development flow, such as software emulation, hardware emulation, and system run as well as debugging support for the host code and kernel code. 

1.5 Creating Kernels and Compiling the Amazon FPGA Image
Explains the steps required to create FPGA kernels, assemble the FPGA program, and compile the Amazon FPGA Image (AFI). 

1.6 Setting Up an AWS F1 Instance
Describes how to set up an AWS account, configure the instance, and set up the SDAccel development environment. 
  
1.7 Running an Example Design Using the Makefile Flow

Walks through running an example design on AWS F1 using the makefile flow. 

1.8 Running an Example Design Using the GUI Flow
Walks through running an example design on AWS F1 using the GUI flow. 

1.9 Profiling and Optimizing an F1 Accelerator
Details using the SDAccel development environment to create, profile, and optimize an F1 accelerator. 

1.10 Using the RTL Kernel Wizard to Reuse Existing IP as F1 Accelerators 
Describes how the SDAccel environment provides RTL kernel developers with a framework to integrate their hardware functions into an application running on a host PC connected to an FPGA via a PCIe® interface

Partners 

Upcoming Program

TechSource Systems is the Sole Distributor and Authorised Training Partner of Mathworks Products

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