Xilinx

Embedded Systems

Advanced Systems Software Design

Course Description

Software design engineers will learn how to make full use of the components available in the Zynq® System on a Chip (SoC) processing system (PS).

The course provides experience with:
 Implementing an effective Zynq SoC boot design methodology
 Creating an FSBL image for flash
 Utilizing advanced Cortex™-A9 processor services
 Analyzing the DMA controller in the Zynq SoC
 Examining the various library services for peripherals such as Ethernet and USB controllers

Partners 

Upcoming Program

TechSource Systems is the Sole Distributor and Authorised Training Partner of Mathworks Products

Duration

2 Days

Who Should Attend

Software design engineers interested in fully utilizing the Zynq extensible processing platform

Course Prerequisites

  • Embedded Systems Software Design or equivalent knowledge

  • C or C++ programming experience

  • Conceptual understanding of embedded processing systems, including device drivers, interrupt routines, Xilinx Standalone library services, user applications, and boot loader operation 

  • Experience developing software for embedded processor applications

Software Tools

  • Vivado® Design or System Edition 2017.3

Hardware

  • Architecture: Zynq-7000 All Programmable SoC*

  • Demo board: Zynq-7000 All Programmable SoC ZC702 or ZedBoard*

Skills Gained

After completing this training, you will know how to:

  • Implement an effective Zynq All Programmable SoC boot design methodology

  • Create an appropriate FSBL image for flash 

  • Identify advanced Cortex™-A9 processor services for fully utilizing the capabilities of the Zynq All Programmable SoC

  • Analyze the operation and capabilities of the DMA controller in the Zynq All Programmable SoC

  • Examine the various Standalone library services and performance capabilities of the Ethernet and USB controllers in the Zynq All Programmable SoC

  • Describe the Standalone library services available for low-speed peripherals that are contained in the Zynq All Programmable SoC PS

Course Outline

  • ​Booting: Overview {Lecture, Lab}

  • Booting: Boot Memory Technologies {Lecture}

  • Booting: Flow {Lecture}

  • Booting: PS Processors {Lecture, Lab}

  • Booting: PL {Lecture, Lab}

  • Booting: Secure Boot {Lecture}

  • Booting: FSBL {Lecture, Demo}

  • General Interrupt Controller {Lecture}

  • Processor Caching and SCLR {Lecture}

  • NEON Co-Processing {Lecture}

  • DMA: Introduction and Features {Lecture}

  • DMA: Block Design and Interrupts {Lecture}

  • DMA: Read and Write {Lecture, Lab}

  • High-Speed Peripherals: Gigabit Ethernet {Lecture, Lab}

  • High-Speed Peripherals: USB {Lecture}

  • Low-Speed Peripherals: Overview {Lecture, Lab}

  • Low-Speed Peripherals: UART {Lecture, Demo}

  • Low Speed Peripherals: CAN {Lecture, Demo}

  • Low-Speed Peripherals: I2C {Lecture}

  • Low-Speed Peripherals: SPI {Lecture}

  • Low-Speed Peripherals: SD/SDIO {Lecture}

Topic Descriptions

 

  • Booting: Overview – Introduces the main points to how booting a processor is handled in Zynq All Programmable devices and MicroBlaze processors.

  • Booting: Boot Memory Technologies – introduces the main points of the memories that can be booted or executed from.

  • Booting: Flow – Provides a low-level view of the booting process.

  • Booting: PS Processors – Introduces the concepts behind a single-core boot, a dual-core boot, and symmetric or asymmetric processing.

  • Booting: PL – Introduces the concepts behind configuring the PL at boot.

  • Booting: Secure Boot – Introduces the concepts behind secure booting.

  • Booting: FSBL – Introduces the First Stage Boot Loader (FSBL).

  • General Interrupt Controller – Introduces the general interrupt controller (GIC), its features, and some examples of its use.

  • Processor Caching and SCLR – Introduces the concepts behind processing caching and the System-Level Control Register.

  • NEON Co-Processing – Introduces the concepts behind the NEON co-processor.

  • DMA: Introduction and Features – Introduces the direct memory access controller.

  • DMA: Block Design and Interrupts – Introduces the DMA block design and the DMA interrupts.

  • DMA: Read and Write – Introduces the concepts behind DMA reading and writing.

  • High-Speed Peripherals: Gigabit Ethernet – Introduces the Gigabit Ethernet high-speed peripheral.

  • High-Speed Peripherals: USB – Introduces the USB high-speed peripheral.

  • Low-Speed Peripherals: Overview – Introduces the low-speed peripherals in the Zynq All Programmable SoC.

  • Low-Speed Peripherals: UART – Introduces the UART low-speed peripheral.

  • Low Speed Peripherals: CAN – Introduces the CAN low-speed peripheral.

  • Low-Speed Peripherals: I2C – Introduces the I2C low-speed peripheral.

  • Low-Speed Peripherals: SPI – Introduces the SPI low-speed peripheral.

  • Low-Speed Peripherals: SD/SDIO – Introduces the SD/SDIO low-speed peripheral.