Embedded Systems

Advanced Features and Techniques of Embedded Systems Design

Course Description

Learn how to use advanced components of embedded systems design for architecting a complex system in the Zynq System on a Chip (SoC) or MicroBlaze™ soft processor.
Hands-on labs provide experience with:
 Developing, debugging, and simulating an embedded system
 Utilizing memory resources
 Implementing high-performance DMA
 Improving designs by using the Vivado IP Integrator
 Demo boards in which designs are downloaded and verified

Advanced Features and Techniques of Embedded Systems Design course builds on the skills gained in the Embedded Systems Design course.



Upcoming Program

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Embedded Hardware 4


2 Days

Who Should Attend

  • Hardware, firmware, and system design engineers who are interested in Xilinx embedded systems development flow

Course Prerequisites

  • Embedded Systems Design course or experience with embedded systems design and the Vivado Design Suite

  • Basic C programming

  • Working knowledge of the Zynq All Programmable SoC or Microblaze processor

Software Tools

  • Vivado Design or System Edition 2017.3


  • Architecture: Zynq-7000 All Programmable SoC and 7 series FPGAs

  • Demo board: Zynq-7000 All Programmable SoC ZC702 or ZedBoard*

Skills Gained

After completing this comprehensive training, you will have the necessary skills to:

  • Assemble an advanced embedded system

  • Take advantage of the various features of the Zynq SoC, Zynq UltraScale+ MPSoC, and Cortex and MicroBlaze processors, including the AXI interconnect, and the various memory controllers

  • Apply advanced debugging techniques, including the use of the Vivado logic analyzer tool for debugging an embedded system and HDL system simulation of processor-based designs

  • Identify the steps involved in integrating a memory controller into an embedded system using the Cortex and MicroBlaze processors

  • Integrate an interrupt controller and interrupt handler into an embedded design

  • Design a flash memory-based system and boot load from off-chip flash memory

  • Perform HDL-based system simulation

Course Outline

  • Overview of Embedded Hardware Development {Demo}

  • Hardware-Software Flow {Lab}

  • Software Overview

  • Zynq-7000 All Programmable SoC Architecture Overview {Lab, Demo}

  • MicroBlaze Processor Architecture Overview {Lab}

  • Zynq UltraScale+ MPSoC Overview {Lab, Demo}

  • Debugging: Hardware Intoduction {Demo}

  • Debugging: Hardware - Marking Nets {Lab}

  • Debugging: Hardware-Software Co-Debugging (Cross-Triggering) {Lab}

  • Memory Types: Memory Overview

  • Memory Types: Block RAM Controllers

  • Memory Types: Static Memory Controllers

  • Memory Types: DDRx Memory Operation

  • Memory Types: Dynamic Memory Controller (Zynq-7000 Device)

  • Interrupt Concepts: Introduction to Interrupts

  • Interrupt Concepts: Interrupts and the Zynq-7000 Device

  • Interrupt Concepts: General Interrupt Controller

  • Interrupt Concepts: Interrupts and the MicroBlaze Processor

  • Interrupt Concepts: AXI Interrupt Controller for the MicroBlaze Processor

  • AXI Concepts: AXI Streaming - Introduction

  • AXI Concepts: MicroBlaze Processor Streaming Ports

  • AXI Concepts: AXI Streaming FIFO

  • AXI Concepts: Connecting AXI IP {Demo}

  • AXI Concepts: DMA

  • Zynq-7000 Device PS-PL Interface {Demo}

  • PS Peripherals: High-Speed: USB

  • PS Peripherals: High-Speed: Gigabit Ethernet {Lab}

  • PS Peripherals: Low-Speed: Overview {Lab}

  • PS Peripherals: Low-Speed: CAN {Demo}

  • PS Peripherals: Low-Speed: I2C

  • PS Peripherals: Low-Speed: SD/SDIO

  • PS Peripherals: Low-Speed: SPI

  • PS Peripherals: Low-Speed: UART {Demo}

  • Utility Logic

  • Sharing PS Resources (Hardware Perspective) {Lab}

  • Multi-Processor Hardware Architecture

  • Caching

  • Processor Caching and SCLR

  • Accelerator Coherency Port

  • Booting: Flow

  • Booting: PL {Lab}

  • Booting: Flash Image Generation

  • QEMU - Introduction {Demo}